Today we will discuss the design procedure for a switching regulator using the Power Integration PWM converter LNK6666E. The various variants can be seen below
Today we will mainly look to use this controller as fly back converter. To start with we will consider looking inside the chip which is shown in below figure
As it can be seen from the internal block diagram that is consist oscillator, error amplifier, current sense comparator, under voltage lock out and other relevant components along with a high voltage mosfet.
LNK6666E Pin Functions
BYPASS (BP) Pin:
An external bypass capacitor is connected to this pin for the internally generated 5.75 V supply. Based on the connected capacitance determined at start-up, it will provide either auto-restart or latching shutdown option dependant on the fault condition. Please see Table 3.
COMPENSATION (CP) Pin:
This pin is the output of transconductance amplifier. An RC compensation network on this pin provides control loop compensation.
DRAIN (D) Pin:
This pin is the high-voltage power MOSFET drain connection. It also provides internal operating current for start-up until output is in regulation.
FEEDBACK (FB) Pin:
The FEEDBACK pin is used to sense output and input voltage by sensing the auxiliary winding voltage. During MOSFET on-time, the current out of the FEEDBACK pin is sensed to detect the line voltage. During the secondary rectifier conduction time, the feedback voltage is proportional to the
output voltage via the turns ratio between the bias and secondary windings.
PROGRAM (PD) Pin:
This MULTI-FUNCTIONAL pin sets device current limit and optional shutdown delay time extension. During start-up, the internal circuit decodes the current limit based on resistor loaded on the PROGRAM pin. Please see Table 4. It can also be used for optionally extending shutdown delay time by changing the capacitance on the pin. See Figure 6.
SOURCE (S) Pin:
This pin is the power MOSFET source connection. It is also the ground reference for the BYPASS, FEEDBACK, PROGRAM and COMPENSATION pins.
Application diagram
Aniruddh Sharma
Ani-Lab
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