TL494 based Buck Converter

The following design example uses the TL494 to create a 5-V/10-A power supply. This design is based on the following parameters:
VO = 5 V
VI = 32 V
IO = 10 A
fOSC = 20-kHz switching frequency
VR = 20-mV peak-to-peak (VRIPPLE)
ΔIL = 1.5-A inductor current change

Input Source-

The 32-V dc power source for this supply uses a 120-V input, 24-V output transformer rated at 75 VA. The 24-V secondary winding feeds a full-wave bridge rectifier, followed by a current-limiting resistor (0.3 Ω) and two filter capacitors

The output current and voltage are determined by

The 3-A/50-V full-wave bridge rectifier meets these calculated conditions.

Frequency setting-

Connecting an external capacitor and resistor to pins 5 and 6 controls the TL494 oscillator frequency. The
oscillator is set to operate at 20 kHz, using the component values calculated by Equation 8 and
Equation 9:

Choose CT = 0.001 μF and calculate RT:

Voltage Feedback-

The error amplifier compares a sample of the 5-V output to the reference and adjusts the PWM to
maintain a constant output current.

The TL494 internal 5-V reference is divided to 2.5 V by R3 and R4. The output-voltage error signal also is divided to 2.5 V by R8 and R9. If the output must be regulated to exactly 5.0 V, a 10-kΩ potentiometer can be used in place of R8 to provide an adjustment.
To increase the stability of the error-amplifier circuit, the output of the error amplifier is fed back to the inverting input through RT, reducing the gain to 101.

Current Limiting-

The power supply was designed for a 10-A load current and an IL swing of 1.5 A, therefore, the
short-circuit current should be:

Resistors R1 and R2 set the reference of about 1 V on the inverting input of the current-limiting amplifier.
Resistor R13, in series with the load, applies 1 V to the non-inverting terminal of the current-limiting
amplifier when the load current reaches 10 A. The output-pulse width is reduced accordingly. The value of
R13 is:

Soft Start-

To reduce stress on the switching transistors at start-up, the start-up surge that occurs as the output filter capacitor charges must be reduced. The availability of the dead-time control makes implementation of a soft-start circuit relatively simple

The soft-start circuit allows the pulse width at the output to increase slowly (see Figure 38) by applying a negative slope waveform to the dead-time control input (pin 4).
Initially, capacitor C2 forces the dead-time control input to follow the 5-V regulator, which disables the outputs (100% dead time). As the capacitor charges through R6, the output pulse width slowly increases until the control loop takes command. With a resistor ratio of 1:10 for R6 and R7, the voltage at pin 4 after start-up is 0.1 × 5 V, or 0.5 V.
The soft-start time generally is in the range of 25 to 100 clock cycles. If 50 clock cycles at a 20-kHz
switching rate is selected, the soft-start time is:

The value of the capacitor then is determined by:

Output Inductor-

Output Capacitor-

Once the filter inductor has been calculated, the value of the output filter capacitor is calculated to meet the output ripple requirements. An electrolytic capacitor can be modeled as a series connection of an inductance, a resistance, and a capacitance. To provide good filtering, the ripple frequency must be far below the frequencies at which the series inductance becomes important. So, the two components of interest are the capacitance and the effective series resistance (ESR). The maximum ESR is calculated according to the relation between the specified peak-to-peak ripple voltage and the peak-to-peak ripple current.

The minimum capacitance of C3 necessary to maintain the VO ripple voltage at less than the 100-mV
design objective is calculated according to

Transistor-

The transistor power switch was constructed with an NTE153 pnp drive transistor and an NTE331 npn output transistor. These two power devices were connected in a pnp hybrid Darlington circuit configuration

The hybrid Darlington circuit must be saturated at a maximum output current of IO + ΔIL/2 or 10.8 A. The Darlington hFE at 10.8 A must be high enough not to exceed the 250-mA maximum output collector current of the TL494. Based on published NTE153 and NTE331 specifications, the required power-switch minimum drive was calculated by Equation 16 through Equation 18 to be 144 mA:

The value of R10 was calculated by:

Based on these calculations, the nearest standard resistor value of 220 Ω was selected for R10. Resistors R11 and R12 permit the discharge of carriers in switching transistors when they are turned off.
The power supply described demonstrates the flexibility of the TL494 PWM control circuit. This
power-supply design demonstrates many of the power-supply control methods provided by the TL494, as well as the versatility of the control circuit.
A 220-uF, 60-V capacitor is selected because it has a maximum ESR of 0.074 Ω and a maximum ripple current of 2.8 A.

The datasheet for this device can be downloaded from https://www.ti.com/lit/gpn/tl494

Courtesy- www.ti.com

Aniruddh

Ani-Lab